Responsibilities:
•Lead IC Mask design activities while working closely with the project team to meet design specifications in conformance to IC fabrication rules and standards while meeting tape out deadline
•Work closely with circuit engineers applying optimum layout techniques to maximize circuit performance
•Support and provide IC layout designers with strategies for layout implementation including the utilization of various tools for chip and block level designs
•Responsible for total project planning, scheduling, control and monitoring
•Perform quality guarantee checking.
Requirements:
•BS Electronics Engineering or Computer Engineering
•Have at least five (5) years of experience in full custom analog IC Mask layout design, plus at least two (2) years in leadership/supervisory position from any semiconductor design company, either local or abroad
•Proficient in all the stages of IC mask design, from chip floorplanning, block layout, chip consolidation, layout verification, design reviews until tapeout
•Comprehensive understanding of the different layout considerations: matching, shielding, guardrings, latch-up, electron-migration, IR drop, etc
•Well versed in using any EDA tool specific for IC mask designing
•Proven work experience in IC mask design project leading with the following proficiencies: leadership, schedule planning and negotiation, critical thinking, problem solving, multi-tasking and adaptive to changes
•Above average oral and written communication skills, Japanese language skills is an advantage but not a requirement
•Customer-driven, always targets to exceed customer expectations